The present invention relates to a multi-chip module (MCM), particularly to a technique to be applied effectively to a multi-chip module structured so that a plurality of semiconductor chips, each having a function different from those of others, are mounted on one substrate, thereby the multi-chip module is configured as one semiconductor integrated circuit device.
According to the so-called multi-chip module technique, a plurality of semiconductor chips are mounted on one substrate provided with a plurality of internal wired lines and a plurality of external terminals so that those semiconductor chips are united with the substrate into one integrated circuit device. For such an integrated circuit device, Japanese Unexamined Patent Publication Nos. Hei 6(1994)-224360, 2003-7963, and 2003-224242 disclose methods that provide the object integrated circuit device in which a plurality of chips are stacked with bonding wires. Japanese Unexamined Patent Publication No. Hei 6(1994)-224360 discloses a method that provides step-cutting on the back side of each chip mounted in such a device. Japanese Unexamined Patent Publication No. 2003-7963 discloses a method that provides each mounted chip with a spacer and Japanese Unexamined Patent Publication No. 2003-224242 discloses a method that provides each mounted chip with a notch at its back side.
[Patent document 1] Japanese Unexamined Patent Publication No. Hei 6(1994)-224360
[Patent document 2] Japanese Unexamined Patent Publication No. 2003-7963
[Patent document 3] Japanese Unexamined Patent Publication No. 2003-224242